Digital Core Design

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DFPMU

Floating Point Coprocessor

The DFPMU is a Floating Point Coprocessor, designed to assist the CPU in performing floating point mathematic computations. It replaces directly C software functions by equivalent, very fast hardware operations, which significantly accelerate the system performance. It doesn't require neither programming nor modifications in the main software. Everything is executed automatically during software compilation, by the DFPMU C driver.

Our efficient coprocessor was designed to operate with DCD’s DP8051, but can also operate with any other 8-, 16- and 32-bit processor. Drivers for all popular 8051 C compilers are delivered together with the package.
The DFPMU uses the specialized CORDIC and standard algorithms to compute math functions. It supports addition, subtraction, multiplication, division, square root, comparison, absolute value, change sign of a number and trigonometric functions: sine, cosine, tangent and arctangent. It has a built-in conversion instructions from integer type to floating point type and vice versa. The input numbers' format has been developed according to the IEEE-754 standard. Our solution supports single precision real numbers, 16-bit, 32-bit integers and is prepared to be used with 8-, 16- and 32-bit processors.
The DFPMU is a technology independent design, which can be implemented in various process technologies.


Family summary

Design Standard compliance Arithmetic operations
ADD, SUB, MUL, DIV, SQRT, COMP
Trigonometric operations
SIN, COS, TAN, ARCTAN
Processors interfaces
8,16,32 bit
Single precision Double precision 8/16/32 bit integers 52-bit integers
DFPAU IEEE-754 + - + + - - -
DFPMU IEEE-754 + + + + - + -
DFPAU-DP IEEE-754 + - + + + + +
DFPMU-DP IEEE-754 + + + + + + +

The main features of each Arithmetic Coprocessors family member has been summarized in table above. It gives a briefly member characterization helping you to select the most suitable IP Core for your application.

Key Features

  • Direct replacement for C float software functions such as: +, -, *, /,==, !=,>=, <=, <, >
  • C interface supplied for all popular compilers: GNU C/C++, 8051 compilers
  • No programming required
  • IEEE-754 Single precision real format support – float type
  • 16-bit word and 32-bit short integers format supported – integer types
  • Flexible arguments and result registers location
  • Performs the following functions:
    • FADD, FSUB – addition, subtraction
    • FMUL, FDIV – multiplication, division
    • FSQRT – square root
    • FCHS, FABS – change of sign, absolute value
    • FXAM – examine input data
    • FUCOM – comparison
    • FSIN, FCOS – sine, cosine
    • FTAN – tangent
    • FATAN – arctangent
    • FILDW, FILD – 16-bit, 32-bit integer to float
    • FISTW, FIST – float to 16-bit, 32-bit integer
  • Exceptions built-in routines
  • Masks each exception indicator:
    • Precision lack PE
    • Underflow result UE
    • Overflow result OE
    • Invalid operand IE
    • Division by zero ZE
    • Denormal operand DE
  • Fully synthesizable
  • Static synchronous design
  • Positive edge clocking and no internal tri-states
  • Scan test ready

Applications

  • Math coprocessors
  • DSP algorithms
  • Embedded arithmetic coprocessor
  • Fast data processing & control

Symbol

 clk
 rst
 datai1 (31:0)
 addr2 (4:0)
 cs
 we
datao1 (31:0) 
irq 

Pins description

PinTypeDescription
clkinputGlobal clock
rstinputGlobal reset
datai1 (31:0)inputData bus input
addr2 (4:0)inputRegister address to read/write
csinputChip select for read/write
weinputData write enable
datao1 (31:0)outputData bus output
irqoutputInterrupt request indicator

Block Diagram

AlignIt performs the numbers analyze against IEEE-754 standard compliance. Information about the data classes is passed as a result to appropriate internal module.
Control UnitIt manages execution of all instructions and internal operation required to carry particular function.
ExponentIt performs operations on exponent part of number. The addition, subtraction, shifting, comparison and conversion operations are executed in this module. It contains exponents and work registers.
CORDICCORDIC performs trigonometric operations on input data. The sine, cosine, tangent and arctangent operations are executed in this module. It contains three work registers.
InterfaceIt is an interface between external device and DFPAU internal 32-bit modules. It contains data, control and status registers. It can be configured to work with 8-, 16- and 32-bit processors.

1 - data bus can be configured as 8-, 16- or 32- bit depends on processor's bus size
2 - address bus is aligned to work with 8- (3:0), 16- (3:1) or 32- (4:2) bit processors
datai1 (31:0)
datao1 (31:0)
addr2 (4:0)
cs
we
irq
MantissaIt performs operations on mantissa part of number. The addition, subtraction, multiplication, division, square root, comparison and conversion operations are executed in this module. It contains mantissas and work registers.
ShifterIt performs mantissa shifting during normalization, denormalization operations. Information about out-shifted bits is stored for rounding process.
clk
rst
Exponent bus Exponent data bus is 17-bit wide bus used for exponent transferring between modules.
Mantissa Mantissa data bus. It is 70-bit wide internal bus used for mantissas transferring between modules.
Control bus Control bus is intended for control signals connected to each module. Main control is performed by Control Unit.

Units

Align
It performs the numbers analyze against IEEE-754 standard compliance. Information about the data classes is passed as a result to appropriate internal module.
Control Unit
It manages execution of all instructions and internal operation required to carry particular function.
Exponent
It performs operations on exponent part of number. The addition, subtraction, shifting, comparison and conversion operations are executed in this module. It contains exponents and work registers.

CORDIC
CORDIC performs trigonometric operations on input data. The sine, cosine, tangent and arctangent operations are executed in this module. It contains three work registers.
Interface
It is an interface between external device and DFPAU internal 32-bit modules. It contains data, control and status registers. It can be configured to work with 8-, 16- and 32-bit processors.

1 - data bus can be configured as 8-, 16- or 32- bit depends on processor's bus size
2 - address bus is aligned to work with 8- (3:0), 16- (3:1) or 32- (4:2) bit processors
Mantissa
It performs operations on mantissa part of number. The addition, subtraction, multiplication, division, square root, comparison and conversion operations are executed in this module. It contains mantissas and work registers.

Shifter
It performs mantissa shifting during normalization, denormalization operations. Information about out-shifted bits is stored for rounding process.